1. Field of the Invention
The present invention relates to non-volatile memory devices, and more particularly to device suitable for constructing large-scale, ultra-compact memory systems.
2. Description of Related Art
The ever-increasing demand for stable, compact and reliable non-volatile memory, particularly for applications related to flash memory devices, has led to the introduction of a number of different devices. One highly useful technology has been resistive random access memory (RRAM), in which the memory element exhibits an ability to change between two or more states, each having a characteristic resistance level. The ability to move between such states is easily translated into an ability to display two resistance levels, which can easily be equated to logical values 0 and 1.
A number of materials have shown an ability that allows their use in such memory applications. One example are the so-called chalcogenides, which have at least two solid phases, including for example a generally amorphous solid phase and a generally crystalline solid phase. These materials can be caused to change phase by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous state is characterized by higher resistivity than the generally crystalline state, which can be readily sensed to indicate data. These properties have generated interest in using programmable resistive material to form nonvolatile memory circuits, which can be read and written with random access.
The change from the amorphous to the crystalline state is generally a lower current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure, after which the phase change material cools quickly, quenching the phase change process allowing at least a portion of the phase change structure to stabilize in the amorphous state. It is desirable to minimize the magnitude of the reset current used to cause transition of phase change material from crystalline state to amorphous state. The magnitude of the reset current needed for reset can be reduced by reducing the size of the phase change material element in the cell and of the contact area between electrodes and the phase change material, so that higher current densities are achieved with small absolute current values through the phase change material element.
One direction of development has been toward forming small pores in an integrated circuit structure, and using small quantities of programmable resistive material to fill the small pores. Patents illustrating development toward small pores include: Ovshinsky, “Multibit Single Cell Memory Element Having Tapered Contact,” U.S. Pat. No. 5,687,112, issued Nov. 11, 1997; Zahorik et al., “Method of Making Chalogenide [sic] Memory Device,” U.S. Pat. No. 5,789,277, issued Aug. 4, 1998; Doan et al., “Controllable Ovonic Phase-Change Semiconductor Memory Device and Methods of Fabricating the Same,” U.S. Pat. No. 6,150,253, issued Nov. 21, 2000.
Problems have arisen in manufacturing such devices with very small dimensions, and with variations in process that meets tight specifications needed for large-scale memory devices. Moreover, as increases in capacity have led to decreases in the sizes required for such devices, the industry is approaching the area where physical limits, imposed, for example, by the size of the atoms involved, are impeding future developments. The art continues to seek better techniques for obtaining increased memory performance in reduced space.